1. Field of the Invention
The present inventive concept relates to a high voltage semiconductor device, and more particularly, to a lateral diffusion metal oxide semiconductor (LDMOS) transistor device in which a field shaping layer is formed on the entire surface of a semiconductor substrate and a method of fabricating the same.
2. Description of the Related Art
In general, high voltage integrated circuits (HVICs) in which at least one high voltage transistor and low voltage circuits are formed in a single chip are used in, for example, power control systems, such as switching power suppliers or motor drivers. HVICs include a high voltage portion, a low voltage portion, and a junction termination portion disposed between the high voltage portion and the low voltage portion. The junction termination portion isolates the high voltage portion from the low voltage portion. Level-shifting devices for level-shifting a signal from the low voltage portion and providing it to the high voltage portion are arranged in the junction termination portion.
Examples of level-shifting devices include lateral diffusion metal-oxide semiconductor (LDMOS) transistors. LDMOS transistors should maintain high break-down-voltage and minimize on-resistance. To obtain these characteristics, LDMOS transistors having a reduced surface field (RESURF) are used.
In lateral diffusion metal-oxide semiconductor (LDMOS) transistors, a P-type top region that is used to reduce a surface field completely depletes a portion of an N-type epitaxial layer formed between a source region and a drain region, and thus, a high voltage-break-down-voltage can be obtained. In this regard, the P-type top region and the N-type epitaxial layer should strike a charge balance. If the P-type top region and the N-type epitaxial layer are completely depleted, in general, a high electric field is concentrated at a surface of the N-type epitaxial layer. When the high electric field is focused on the surface of the N-type epitaxial layer, recovery is impossible after break-down occurs, or semiconductor devices arranged on the N-type epitaxial layer are burned out. Also, the electric field focused on the surface of the N-type epitaxial layer causes deterioration of the semiconductor devices arranged on the N-type the epitaxial layer.